It’s a collaborative programme that is bridging the gap between hardware and software and academia and industry, and aiming to create a more resilient and secure foundation for a safer digital future.

As part of this programme, UK companies can gain access to an Arm Morello evaluation board, with its cutting-edge instruction set architecture. The board is a test platform to implement a capability-aware ARM64 architecture, based on Capability Hardware Enhanced RISC Instructions (CHERI). This hardware prototype has a novel feature that allows the use of architectural capabilities to replace C/C++ pointers, to prevent and mitigate many of the vulnerabilities associated with unsafe memory access.

CHERI, a new software architecture developed by the University of Cambridge, offers memory-safe capabilities which enable advanced compartmentalisation models that can revamp software designs, harden networks, and reduce attack surfaces. Participants will be able to experiment with these technologies to uncover security vulnerabilities in their own products.

Companies will also get access to technical guides and expert support from Arm and the University of Cambridge. Each cohort for TAP lasts 6 months and companies will receive a grant of £15,000 to support their project. The application window will close on April 1st - register your interest in applying below:

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